The objective of this one-day workshop is to investigate opportunities in accelerating data management systems and workloads (which include traditional OLTP, data warehousing/OLAP, ETL, Streaming/Real-time, Business Analytics, and XML/RDF Processing) using processors (e.g., commodity and specialized Multi-core, GPUs, and FPGAs), storage systems (e.g., Storage-class Memories like SSDs and Phase-change Memory), and hybrid programming models like CUDA, OpenCL, and OpenACC.

The current data management scenario is characterized by the following trends: traditional OLTP and OLAP/data warehousing systems are being used for increasing complex workloads (e.g., Petabyte of data, complex queries under real-time constraints, etc.); applications are becoming far more distributed, often consisting of different data processing components; non-traditional domains such as bio-informatics, social networking, mobile computing, sensor applications, gaming are generating growing quantities of data of different types; economical and energy constraints are leading to greater consolidation and virtualization of resources; and analyzing vast quantities of complex data is becoming more important than traditional transactional processing.

At the same time, there have been tremendous improvements in the CPU and memory technologies. Newer processors are more capable in the CPU and memory capabilities and are optimized for multiple application domains. Commodity systems are increasingly using multi-core processors with more than 4 cores per chip and enterprise-class systems are using processors with 8 cores per chip, where each core can execute upto 4 simultaneous threads. Specialized multi-core processors such as the GPUs have brought the computational capabilities of supercomputers to cheaper commodity machines. On the storage front, FLASH-based solid state devices (SSDs) are becoming smaller in size, cheaper in price, and larger in capacity. Exotic technologies like Phase-change memory are on the near-term horizon and can be game-changers in the way data is stored and processed.

In spite of the trends, currently there is limited usage of these technologies in data management domain. Naive usage of multi-core processors or SSDs often leads to unbalanced system. It is therefore important to evaluate applications in a holistic manner to ensure effective utilization of CPU and memory resources. This workshop aims to understand impact of modern hardware technologies on accelerating core components of data management workloads. Specifically, the workshop hopes to explore the interplay between overall system design, core algorithms, query optimization strategies, programming approaches, performance modelling and evaluation, etc., from the perspective of data management applications.

The suggested topics of interest include, but are not restricted to:

• Hardware and System Issues in Domain-specific Accelerators
• New Programming Methodologies for Data Management Problems on Modern Hardware
• Query Processing for Hybrid Architectures
• Large-scale I/O-intensive (Big Data) Applications
• Parallelizing/Accelerating Analytical (e.g., Data Mining) Workloads
• Autonomic Tuning for Data Management Workloads on Hybrid Architectures
• Algorithms for Accelerating Multi-modal Multi-tiered Systems
• Energy Efficient Software-Hardware Co-design for Data Management Workloads
• Parallelizing non-traditional (e.g., graph mining) workloads
• Algorithms and Performance Models for modern Storage Sub-systems
• Data Layout Issues for Modern Memory and Storage Hierarchies
• Novel Applications of Low-Power Processors (e.g., ARM Processor based systems)
• New Benchmarking Methodologies for Storage-class Memories

8.45 am-5.30 pm, Şadırvan A

8.45 am: Welcome Comments

9.00-10.00 am: Keynote by Jim Maltby, Solutions Architect, YarcData Inc.

uRiKA: A high-performance multithreaded in-memory graph database appliance

Parallel Graph databases present unique challenges with respect to domain decomposition, random memory accesses and load balancing. I will present a new graph database appliance, uRiKA, that is based on a hybrid supercomputer system containing custom Cray multithreaded processors. These data-cache free processors enable a scalable shared memory subsystem up to 512 TB, with excellent random access performance. The parallel database architecture based on this system and relevant customer use cases will be discussed.

10.00-10.30 am: Coffee Break

10.30 am-12.00 pm noon Session 1

• 10.30-11.00 am: Efficient Locking Techniques for Databases on Modern Hardware, Hideaki Kimura (Brown University), Goetz Graefe and Harumi Kuno (HP Labs) (Slides)
• 11.00-11.30 am: Fast Lookups for In-Memory Column Stores: Group-Key Indices, Lookup and Maintenance, Martin Faust, David Schwalb, Jens Krueger and Hasso Plattner (Hasso Plattner Institute) (Slides)
• 11.30-12.00 pm: Path processing using Solid State Storage, Manos Athanassoulis (EPFL), Bishwaranjan Bhattacharjee (IBM Watson Research), Mustafa Canim (IBM Watson Research) and Kenneth A. Ross (Columbia University) (Slides)

12.00-1.30 pm: Lunch

1.30-3.00 pm Session 2

• 1.30-2.00 pm: A First Step Towards GPU-assisted Query Optimization, Max Heimel and Volker Markl (Technische Universität Berlin) (Slides)
• 2.00-2.30 pm: A Parallel Twig Join Algorithm for XML Processing using a GPGPU, Lila Shnaiderman and Oded Shmueli (Technion) (Slides)
• 2.30-3.00 pm: Scalable ordered indexing of streaming data, Sobhan Badiozamany and Tore Risch (Uppsala University) (Slides)

3.00-3.45 pm: Coffee Break

3.45-5.30 pm: Workshop Panel (Moderator: Rajesh Bordawekar, IBM Research)

Impact of the convergence of three worlds: High-Performance Computing, Databases, and Analytics

Confirmed Panelist include:

• Martin Grund (HPI, Potsdam) (Position Statement)
• Prof. Alfons Kemper (TU Munich) (Position Statement)
• Jim Maltby (Yarcdata) (Position Statement)
• Stefan Manegold (CWI, Amsterdam) (Position Statement)
• Tirthankar Lahiri (Oracle) (Position Statement)
• Prof. Joel Saltz (Emory University) (Position Statement)

Important Dates

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• Paper Submission: Updated! Sunday, June 24, 2012
• Notification of Acceptance: Friday, July 13, 2012
• Camera-ready Submission: Monday, July 23, 2012
• Workshop Date: Monday, August 27, 2012

Submission Instructions

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The workshop proceedings will be published by VLDB.

Submission Site 

All submissions will be handled electronically via EasyChair.

Formatting Guidelines 

We will use the same document templates as the VLDB12 conference. You can find them here.

It is the authors' responsibility to ensure that their submissions adhere strictly to the VLDB format detailed here. In particular, it is not allowed to modify the format with the objective of squeezing in more material. Submissions that do not comply with the formatting detailed here will be rejected without review. 

The paper length is limited to 12 pages. Submissions of lesser length are acceptable as long as they adhere to the VLDB format. 

Organization

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Workshop Co-Chairs

• Rajesh Bordawekar, IBM T.J. Watson Research Center
• Christian A. Lang, Acelot, Inc.

       For questions regarding the workshop please send email to contact@adms-conf.org.

Program Committee

• John Davis, Microsoft Research
• Christophe Dubach, University of Edinburgh
• Pradeep Dubey, Intel
• Michael Garland, Nvidia
• Bugra Gedik, Bilkent University
• Tirthankar Lahiri, Oracle
• Stefan Manegold, CWI
• George Mihaila, Google
• C. Mohan, IBM Almaden Research
• D. K. Panda, Ohio State University
• Marcel Rosu, IBM Watson Research
• Ji-Yong Shin, Cornell University
• Sayantan Sur, Intel
• Jens Teubner, ETH Zurich
• Thomas Willhalm, Intel Germany