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The objective of this one-day workshop is to investigate opportunities in accelerating data management
systems and workloads (which include traditional OLTP, data warehousing/OLAP, ETL, Streaming/Realtime,
and XML/RDF Processing) using CPU (e.g., commodity and specialized Multi-core, Many-core, GPUs, and
FPGAs), storage systems (e.g., Storage-class Memories like SSDs and Phase-change Memory), and multicore
programming strategies like OpenCL.
The current data management scenario is characterized by the following trends: traditional OLTP and
OLAP/data warehousing systems are being used for increasing complex workloads (e.g., Petabyte of data,
complex queries under real-time constraints, etc.); applications are becoming far more distributed, often
consisting of different data processing components; non-traditional domains such as bio-informatics, social
networking, mobile computing, sensor applications, gaming are generating growing quantities of data of
different types; economical and energy constraints are leading to greater consolidation and virtualization
of resources; and analyzing vast quantities of complex data is becoming more important than traditional
transactional processing.
At the same time, there have been tremendous improvements in the CPU and memory technologies.
Newer processors are more capable in the CPU and memory capabilities and are optimized for multiple
application domains. Commodity systems are increasingly using multi-core processors with more than 4
cores per chip and enterprise-class systems are using processors with at least 32 cores per chip. Specialized
multi-core processors such as the Cell and GPUs have brought the computational capabilities of supercomputers
to cheaper commodity machines. On the storage front, FLASH-based solid state devices (SSDs) are
becoming smaller in size, cheaper in price, and larger in capacity. Exotic technologies like Phase-change
memory are on the near-term horizon and can be game-changers in the way data is stored and processed.
In spite of the trends, currently there is limited usage of these technologies in data management domain.
Naive usage of multi-core processors or SSDs often leads to unbalanced system. It is therefore important to
evaluate applications in a holistic manner to ensure effective utilization of CPU and memory resources. This
workshop aims to understand impact of modern hardware technologies on accelerating core components
of data management workloads. Specifically, the workshop hopes to explore the interplay between overall
system design, core algorithms, query optimization strategies, programming approaches, performance modelling
and evaluation, etc., from the perspective of data management applications.
| 09:00-09:15 | ADMS 2010 Welcome | Galleria III |
| 09:15-10:30 | Keynote by Neil Carson, CTO of Fusion-io
"NAND Flash as a New Memory Tier"
Abstract: Many solid-state disk (SSD) companies have entered the marketplace in recent years. Most of these companies architect the NAND flash medium into existing hard disk form factors that sit behind legacy storage protocols, minimizing the inherent value of flash memory.
Others, by contrast, implement a cut-through design that eliminates the need for legacy storage architecture and protocols. They connect the flash directly to the system bus, similar to RAM. With these technologies, enterprise organizations can develop balanced systems that utilize the completely new tier of flash-based memory. Analysts are now beginning to recognize this new space and are calling it a virtual flash memory tier.
Neil Carson, CTO of Fusion-io, a provider of a new NAND Flash-based memory tier (ioMemory), will discuss the differences between these two approaches and demonstrate the value of architecting the medium as a new memory tier. | Galleria III |
| 10:30-10:45 | Coffee Break | |
Paper Session: Optimizing for Multi-core Processors
Session Chair: Christian Lang |
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| 10:45-11:10 | A Nearest Neighbor Data Structure for Graphics Hardware.
Lawrence Cayton (Max Planck Institute) | Galleria III |
| 11:10-11:35 | GPU-Based Speculative Query Processing for Database Operations.
Peter Benjamin Volk (Technische Universität Dresden),
Dirk Habich (Technische Universität Dresden), Wolfgang Lehner (Technische Universität Dresden) | Galleria III |
| 11:35-12:00 | Modeling Multithreaded Query Execution on Chip Multiprocessors.
Konstantinos Krikellas (Greenplum Inc.),
Stratis Viglas (University of Edinburgh), Marcelo Cintra (University of Edinburgh) | Galleria III |
| 12:00-12:25 | On Transactional Memory, Spinlocks, and Database Transactions.
Khai Tran (University of Wisconsin Madison),
Spyros Blanas (University of Wisconsin Madison), Jeffrey Naughton (University of Wisconsin Madison) | Galleria III |
| 12:30-02:00 | Lunch Break | Kiwi Lounge, Level 2 |
Paper Session: Optimizing for Solid-State Storage
Session Chair: Rajesh Bordawekar |
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| 02:00-02:30 | Building Large Storage Based On Flash Disks.
Ilia Petrov (Technische Universität Darmstadt),
Guillermo Almeida (Technische Universität Darmstadt), Alejandro Buchmann (Technische Universität Darmstadt) | Galleria III |
| 02:30-03:00 | Buffered Bloom Filters on Solid State Storage.
Mustafa Canim (The University of Texas at Dallas),
George A. Mihaila (IBM Watson Research Center), Bishwaranjan Bhattacharjee (IBM Watson Research Center),
Christian A. Lang (IBM Watson Research Center), Kenneth A. Ross (IBM Watson Research Center & Columbia University) | Galleria III |
| 03:00-03:30 | Towards SSD-ready Enterprise Platforms.
Annie Foong (Intel), Bryan Veal (Intel), Frank Hady (Intel) | Galleria III |
| 03:30-04:00 | Coffee Break | |
| 04:00-05:30 | Panel Session on "The Impact of Modern Hardware on DB Design and Implementation"
moderated by Dr. C. Mohan, IBM Fellow.
Panelists include Professor Anastasia Ailamaki (EPFL/CMU),
Professor Gustavo Alonso (ETH Zürich),
Sumanta Chatterjee (Oracle Corporation), and
Pilar de Teodoro (European Space Agency). | Galleria III |
| 05:30-05:45 | Closing Remarks | Galleria III |
- Paper Submission: June 25, 2010
- Notification of Acceptance: July 23, 2010
- Camera-ready Submission: August 9, 2010
- Author Registration Deadline: August 10, 2010 (at least one author must register)
- Early/Regular Conference Registration Deadline: please see VLDB website
- Workshop Date: September 13, 2010
Workshop Co-Chairs
For questions regarding the workshop please send email to contact@adms-conf.org.
Program Committee
- David Bader, Georgia Tech
- Roberto Bayardo, Google
- Brian Cooper, Yahoo! Research
- John Davis, Microsoft Research
- Pradeep Dubey, Intel
- Michael Garland, NVIDIA Research
- Bugra Gedik, IBM Watson Research
- Goetz Graefe, HP Labs
- C Mohan, IBM Almaden Research
- Bongki Moon, University of Arizona
- Jens Teubner, ETH Zürich
- Philip S. Yu, University of Illinois, Chicago
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